The invention is directed to the manufacture of substrates and particularly to the alignment of non-plated tooling holes and solder lands in substrates that interface with one another or are stacked one on the other with the connection leads of various mutually common components extending to solder lands on the respective stacked substrates with the common component positioned by one or more aligned holes in the stacked substrates.
One commonly employed state of the art method for insuring the required alignment of non-plated tooling holes in substrates employs an indirect technique wherein the conductive pattern's position location is first controlled relative to plated-through holes (PTH) which if present are located within the bounds of conductive patterns. This is accomplished in accordance with industry accepted standards as established by ANSI Y144.5, Mil-Std-275 and IPC-D-275 (IPC). The PTH's are then in turn used to control the position of the non-plated through hole (NPTH) pattern. This in effect is a stepping stone process which makes the use of two well established location control practices commonly used in the art. This method introduces large quantities of positional variances inherent with the stepping stone process of the indirect technique. This method forces the control of feature relationships, i.e. the conductive pattern to PTH relationship and the PTH to NPTH relationship, which, in themselves, may not, and generally are not, of any value. In tight tolerance applications, this technique is totally ineffective and impractical. Substrates fabricated via this technique require the use of additional special alignment fixtures at the next step of assembly to ensure proper fit and alignment. This is inconvenient and economically costly.
Another state of the art method entails laborious inspection processes, mandating meticulous and time consuming measurements of pertinent pattern feature sizes and physical positions relative to the tooling hole pattern. Although this method is feasible in tight toleranced applications, the method relies on individualized practices of specifying and verifying the conductive pattern to tooling hole relationships. This method, is vulnerable to misinterpretation and requires the use of unconventional and specialized inspection equipment and skills at the substrate's acceptance stages. This technique consequently is also inconvenient and economically costly.
There has not been a convenient and economically inexpensively method of insuring the positional accuracy of non-plated tooling hole pattern relative to external solder pads until the emergence of the instant invention.